Journal archive

Abstract: In this article the need for the study of the processor core and basic peripheral devices in the process of training students in the architecture of computer systems is defined, considering requirements of the education standards and technologies used in production. The possibilities and prospects for the use of the Verilog HDL in the process of students training in the architecture of computer are analyzed. Main features of the Verilog language, which are important for educational purposes, are listed. The main features and opportunities of HDL-based imitational modeling of digital systems are explored. An example a task for the students to solve during the study of computer systems architecture based on the Verilog HDL and related technologies is also described. As an example, a model of the serial line interface unit is used. A solution is provided, which include a description of the component, a testbench for its logic model testing using Icarus Verilog, as well as the test results presentation cases using GTKWave. A list of test questions and tasks to measure the mastery level of education materials is provided.